Wafer map failure pattern classifier
Inspired by publicly reported work at Intel
Recognise failure patterns on wafer maps automatically and feed them into a yield dashboard.
The brief
Intel has described AI that recognises failure patterns across wafers and machine vision that classifies defects faster and more accurately than manual review. Build a wafer-map pattern classifier on a large public dataset: handle the imbalance, compare a CNN with feature-based models, find new patterns with clustering, and build a yield dashboard engineers would use. Good looks like: per-pattern recall, a confusion matrix, unsupervised discovery of unlabelled patterns, and a dashboard with trends by lot.
Read the case first
What Intel has said in public about this kind of work, on its own pages:
- Transforming Manufacturing Yield Analysis with AI (Intel IT) ↗
- Faster, More Accurate Defect Classification Using Machine Vision (Intel IT) ↗
Make it your own
Carry the idea to boards instead of wafers: classify PCB defects for an Indian electronics assembler, or panels for a solar module maker, and design the screen the line engineer sees.
AITeky has no link with Intel, which has not reviewed or endorsed this brief. The brief only draws on what the company has published, uses open data rather than its data, and is a learning exercise: don't present your project as Intel's work or system.
What you will build
- Explore wafer maps and the pattern labels
- Handle imbalance with augmentation
- Train a CNN and a feature-based baseline
- Evaluate per pattern
- Cluster unlabelled maps to find new patterns
- Build a yield dashboard by lot and pattern
Free, open data to build it with
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