AITeky Learn
Major project Electronics, Semiconductors & Telecom

Wafer-map defect classification for chip fabs

Recognise defect patterns on silicon wafer maps and link them to process faults.

The brief

A semiconductor fab inspects thousands of wafers a day. Engineers want each wafer map sorted by defect pattern (edge ring, scratch, centre, donut…) so they can trace the fault to a process step faster. A second data source of process sensor readings can show which steps predict failures. Good looks like: accurate pattern recognition including rare patterns, an inspection view for engineers, and evidence of which process signals matter.

What you will build

  1. Prepare and augment the wafer maps; deal with the large 'no defect' class
  2. Train a CNN classifier and compare with a feature-based baseline
  3. Analyse errors on rare patterns
  4. Use the process sensor data to find signals that predict failure
  5. Build an inspection dashboard
  6. Report how this would fit a fab's yield-improvement workflow

Free, open data to build it with

Check each dataset's licence before you publish your work. Your mentor gives your team its own version of the brief (data, scope or region), so every team's project is its own.

We use essential cookies to run the site. With your permission we also set one anonymous ID to count unique visitors. Cookie notice

Join AiTeky Learn. It's free.

Create a free account to track your progress, save items for later and get study suggestions.

Sign up free Log in