VLSI & Semiconductors
Chip design from Verilog to physical layout, and how AI is changing electronic design.
Beginner
Start here. No background needed beyond school maths.
Circuit Simulation Onramp
MathWorks' free interactive course on building and simulating electrical circuits in Simulink, with a certificate of completion.
MathWorks
Hardware Modeling using Verilog (IIT Kharagpur)
Describe and test digital circuits in Verilog, from combinational logic to state machines and test benches. Free to learn on NPTEL; the certificate needs a proctored exam with a fee.
NPTEL
Advanced
Once the basics are comfortable.
AI-assisted analog and physical design webinar
A webinar from VLSI System Design (VSD) on AI-assisted analog and physical design webinar. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.
VLSI System Design (VSD)
Designing a Single-Cycle RISC-V (RV32IM) on VSDSquadronFM
A video from VLSI System Design (VSD) on Designing a Single-Cycle RISC-V (RV32IM) on VSDSquadronFM. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.
VLSI System Design (VSD)
Webinar - SCL180nm PDK → OpenROAD Flow Scripts (ORFS)
A webinar from VLSI System Design (VSD) on Webinar - SCL180nm PDK → OpenROAD Flow Scripts (ORFS). Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.
VLSI System Design (VSD)
From RTL to GDSII: VSDBabySoC Physical Design in OpenROAD (Floorplan → CTS → Route → STA)
A video from VLSI System Design (VSD) on From RTL to GDSII: VSDBabySoC Physical Design in OpenROAD (Floorplan → CTS → Route → STA). Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.
VLSI System Design (VSD)
India’s SCL 1.2µm RTL-to-GDSII in the Cloud | GitHub Codespaces + Open-Source EDA
A video from VLSI System Design (VSD) on India’s SCL 1.2µm RTL-to-GDSII in the Cloud | GitHub Codespaces + Open-Source EDA. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.
VLSI System Design (VSD)
RISC-V VLSI Workshop: CISC vs RISC, RTL-to-GDS, FPGA Debug & Real Silicon Testing
A workshop session from VLSI System Design (VSD) on RISC-V VLSI Workshop: CISC vs RISC, RTL-to-GDS, FPGA Debug & Real Silicon Testing. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.
VLSI System Design (VSD)
VLSI Physical Design (IIT Kharagpur)
How chips are laid out: partitioning, floorplanning, placement, routing, timing and the algorithms design tools use. Free to learn on NPTEL; the certificate needs a proctored exam with a fee.
NPTEL