AITeky Learn

VLSI & Semiconductors

Chip design from Verilog to physical layout, and how AI is changing electronic design.

All 9 Videos 6 Courses 3
All levels Beginner Advanced Expert

Advanced

Once the basics are comfortable.

Video Advanced ▶ Watch here

AI-assisted analog and physical design webinar

A webinar from VLSI System Design (VSD) on AI-assisted analog and physical design webinar. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.

VLSI System Design (VSD)

Video Advanced ▶ Watch here

Designing a Single-Cycle RISC-V (RV32IM) on VSDSquadronFM

A video from VLSI System Design (VSD) on Designing a Single-Cycle RISC-V (RV32IM) on VSDSquadronFM. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.

VLSI System Design (VSD)

Video Advanced ▶ Watch here

Webinar - SCL180nm PDK → OpenROAD Flow Scripts (ORFS)

A webinar from VLSI System Design (VSD) on Webinar - SCL180nm PDK → OpenROAD Flow Scripts (ORFS). Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.

VLSI System Design (VSD)

Video Advanced ▶ Watch here

From RTL to GDSII: VSDBabySoC Physical Design in OpenROAD (Floorplan → CTS → Route → STA)

A video from VLSI System Design (VSD) on From RTL to GDSII: VSDBabySoC Physical Design in OpenROAD (Floorplan → CTS → Route → STA). Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.

VLSI System Design (VSD)

Video Advanced ▶ Watch here

India’s SCL 1.2µm RTL-to-GDSII in the Cloud | GitHub Codespaces + Open-Source EDA

A video from VLSI System Design (VSD) on India’s SCL 1.2µm RTL-to-GDSII in the Cloud | GitHub Codespaces + Open-Source EDA. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.

VLSI System Design (VSD)

Video Advanced ▶ Watch here

RISC-V VLSI Workshop: CISC vs RISC, RTL-to-GDS, FPGA Debug & Real Silicon Testing

A workshop session from VLSI System Design (VSD) on RISC-V VLSI Workshop: CISC vs RISC, RTL-to-GDS, FPGA Debug & Real Silicon Testing. Best once you are comfortable with the basics of VLSI & Semiconductors. It plays here in the portal, and your progress is saved as you watch.

VLSI System Design (VSD)

Course Advanced ↗ External site

VLSI Physical Design (IIT Kharagpur)

How chips are laid out: partitioning, floorplanning, placement, routing, timing and the algorithms design tools use. Free to learn on NPTEL; the certificate needs a proctored exam with a fee.

NPTEL

More in AI for Engineering

We use essential cookies to run the site. With your permission we also set one anonymous ID to count unique visitors. Cookie notice

Join AiTeky Learn. It's free.

Create a free account to track your progress, save items for later and get study suggestions.

Sign up free Log in